Task usage using Non-blocking assignment

SystemVerilog
5

In reply to sush:

Sorry, forgot about that restriction. Since the code inside the task does not know what the storage class of the variable that was passed to it by reference, you must assume it could have an automatic lifetime, and NBA are not allowed to automatic variables.

The only alternative is go back to the output argument and make a blocking assignment to it. But pass a temporary variable to it.

reg [7:4]width,d1,d2,t2;
 
 
  task t1(input [7:4]f,output reg [7:4]a);
    begin
      d1 <= f;
      a <= d1;
    end
  endtask
 
 
 always@(posedge clk)
   begin
     t1(width,t2);
     d2 <= t2;
   end