SystemVerilog constraint: unique addr across array of structs without auxiliary array

Hi Forum!
Is it possible to constrain unique struct members in a dynamic array without a helper variable? (adr_hlpr in this problem below) We can use 2 foreach loops but is that the only way?

typedef struct {
  rand bit[7:0]  addr;
  rand bit[15:0] data;
}pkt_t;

class db;
  rand pkt_t     pkt[];
  rand bit[7:0]  adr_hlpr[];

  constraint c{
    pkt.size() == 10;
    adr_hlpr.size() == 10;
    unique {adr_hlpr};
    pkt.sum() with ((item.addr == adr_hlpr[item.index]) ? 1:0) == pkt.size();
  };
endclass: db

module     tb_top();
  db db_h;

  initial begin
    db_h = new();
    db_h.randomize();

    $display("pkt : %p", db_h.pkt);
  end
endmodule: tb_top

Why are you looking for another way?