Verification Academy
SystemVerilog Constraint to populate unique values into a 2d fixed-size array without using the unique keyword
SystemVerilog
SystemVerilog
,
systemverilog-constraint
sfenil1804
June 9, 2020, 1:06am
3
In reply to
dave_59
:
Thank you, I understood the mistake.
It works as I intended now!
show post in topic