System verilog function argument output

In reply to Mahantha Deeksha S B:

An SystemVerilog function must always return without any delay or interruptions. That is regardless of whether it returns a value or not. That is regardless of whether it is used inside a procedural block or not.

I think you are confusing the fact that an event control is a procedural statement, but the event_expression does not get evaluated in a procedural context.

A continuous assignment is not a procedural context.

assign a = f1(b,c) + f2(d,e);

When called, functions f1 and f2 must return a value. The two functions get called at time 0, and any time b,c,d or e’s value change. The must return their value immediately without interrupting the expression evaluation.

begin
@(f1(b,c) + f2(d,e))
$display(“done”);
end

An event control is procedural statement that always interrupts the process flow. The event_expresion gets evaluated from that point on just like a continuous assignment. Anytime an operand in the expression changes it value, the expression gets reevaluated. It’s only when the event_expression changes it value can the process resume.

In your last example, the function try always returns 1, so the process will never resume.