//untested
//algorithm:
//compare 2 bits at a time such as bit[0] & bit[1] and incrementally keep comparing till
//BUS_WIDTH-1
//when contiguous 1’s are observed raise the start_flag(precondition) then check for bit[i+1] =
//1 bit [i] = 0 pattern which makes it non contiguous. Then the assertion shouts when
//continuous assign gets error in pattern.
bit start_flag, err_flag;
start_flag = 0;
err_flag = 0;
genvar i;
generate
for (i = 0; i < 32; i++) begin
assign start_flag = (bit[i+1] & bit[i]) == 1? 1 : 0;
assign err_flag = (bit[i+1] & !bit[i]) == 1? 1 : 0;
end
endgenerate
assert_contiguous: assert property( @(posedge clk) disable_iff (rst) start_flag |-> err_flag );