Syntax error in questasim during compilation of APB 3

UVM
1

Hi, can anyone help me in dubugging in a syntax error.
syntax error, unexpected IDENTIFIER.
I am getting this error in every component as I have already included the uvm pkg.

import uvm_pkg::*;
`include "apb_intf.sv"
`include "apb_seq_item.sv"
`include "apb_seq.sv"
`include "apb_sqr.sv"
`include "apb_drv.sv"

`include "apb_mon.sv"
`include "apb_agent.sv"
`include "apb_scb.sv"
`include "apb_env.sv"
`include "apb_test.sv"

module tb;
apb_if pif();

apb_ram dut (.presetn(pif.presetn),
.pclk(pif.pclk),
.psel(pif.psel),
.penable(pif.penable),
.pwrite(pif.pwrite),
.paddr(pif.paddr),
.pwdata(pif.pwdata),
.prdata(pif.prdata),
.pready(pif.pready),
.pslverr(pif.pslverr));

initial begin
pif.pclk <= 0;
end
always #10 pif.pclk <= ~pif.pclk;

initial begin
uvm_config_db#(virtual apb_if)::set(null, "*", "intf", pif);
run_test("apb_test");

end
endmodule
2

In reply to Gautami:

You need to show use the line where the syntax error is occuring.

3

In reply to dave_59:

Hi dave,

Error: (vlog-13069) C:/Users/AIR-NBH-1/Desktop/APB 3/apb_drv.sv(1): near “uvm_driver”: syntax error, unexpected IDENTIFIER.
** Error: C:/Users/AIR-NBH-1/Desktop/APB 3/apb_drv.sv(1): Error in class extension specification.

this the error in every component

Below is my driver component code:-
class apb_drv extends uvm_driver #(apb_seq_item);
`uvm_component_utils(apb_drv)

virtual apb_if vif;
apb_seq_item tx;

function new(string name=“”,uvm_component parent);
super.new(name,parent);
endfunction

function void build_phase(uvm_phase phase);
super.build_phase(phase);
tx = apb_seq_item::type_id::create(“tx”);

uvm_config_db#(virtual apb_if)::get(this,“”,“intf”,vif);

endfunction

task run_phase(uvm_phase phase);
forever
begin
seq_item_port.get_next_item(tx);
if(tx.op == rst)
begin
vif.presetn <= 1’b0;
vif.paddr <= 'h0;
vif.pwdata <= 'h0;
vif.pwrite <= 'b0;
vif.psel <= 'b0;
vif.penable <= 'b0;
@(posedge vif.pclk);
end

else if(tx.op == writed)
begin
vif.psel <= 1’b1;
vif.paddr <= tx.PADDR;
vif.pwdata <= tx.PWDATA;
vif.presetn <= 1’b1;
vif.pwrite <= 1’b1;
@(posedge vif.pclk);
vif.penable <= 1’b1;
@(negedge vif.pready);
vif.penable <= 1’b0;

end

else if(tx.op == readd)
begin
vif.psel <= 1’b1;
vif.paddr <= tx.PADDR;
vif.presetn <= 1’b1;
vif.pwrite <= 1’b0;
@(posedge vif.pclk);
vif.penable <= 1’b1;
@(negedge vif.pready);
vif.penable <= 1’b0;
end
seq_item_port.item_done();

end
endtask

endclass

4

In reply to Gautami:

Are you saying you have 11 files? The first file is what you originally posted that `includes the 10 other files and is the only file on compilation command line? The “apb_seq_item.sv” file compiles without error?

5

In reply to dave_59:

Hi Dave, Thanks for responding,

Yes there are 11 files,
I have compiled every component. Below is the transcript
###############################################################################
project open {C:/Users/AIR-NBH-1/Desktop/APB 3/APB 3}

Loading project APB 3

Compile of apb_agent.sv failed with 2 errors.

Compile of apb_drv.sv failed with 2 errors.

Compile of apb_env.sv failed with 2 errors.

Compile of apb_intf.sv was successful.

Compile of apb_mon.sv failed with 2 errors.

Compile of apb_scb.sv failed with 2 errors.

Compile of apb_seq.sv failed with 2 errors.

Compile of apb_seq_item.sv failed with 2 errors.

Compile of apb_sqr.sv failed with 2 errors.

Compile of apb_test.sv failed with 2 errors.

Compile of design.sv was successful.

Compile of testbench.sv was successful with warnings.

12 compiles, 9 failed with 18 errors.

################################################################################
The error is same as I have sent you in earlier response.
apb_seq_item alsoe failed with the same error.

6

In reply to Gautami:

How do you compile your code?
The order of the error messages is different as the order of the includes.

7

In reply to chr_sue:

Hi chr_sue,

I am compiling through Questasim 64 10.7c, simply adding the files and compiling all.

8

In reply to Gautami:

What you are saying is not precise enough. Try to compile the file which contains module_tb with all the includes.

9

In reply to chr_sue:

Below is my code.
include "uvm_macros.svh" import uvm_pkg::*; include “apb_intf.sv”
include "apb_seq_item.sv" include “apb_seq.sv”
include "apb_sqr.sv" include “apb_drv.sv”

include "apb_mon.sv" include “apb_agent.sv”
include "apb_scb.sv" include “apb_env.sv”
`include “apb_test.sv”

module tb;
apb_if pif();

apb_ram dut (.presetn(pif.presetn),
.pclk(pif.pclk),
.psel(pif.psel),
.penable(pif.penable),
.pwrite(pif.pwrite),
.paddr(pif.paddr),
.pwdata(pif.pwdata),
.prdata(pif.prdata),
.pready(pif.pready),
.pslverr(pif.pslverr));

initial begin
pif.pclk <= 0;
end
always #10 pif.pclk <= ~pif.pclk;

initial begin
uvm_config_db#(virtual apb_if)::set(null, “*”, “intf”, pif);
run_test(“apb_test”);

end
endmodule

for the above code there is no error but warnings are there
vlog -work work -vopt -sv -stats=none {C:/Users/AIR-NBH-1/Desktop/APB 3/testbench.sv}
QuestaSim-64 vlog 10.7c Compiler 2018.08 Aug 18 2018
** Note: (vlog-2286) C:/Users/AIR-NBH-1/Desktop/APB 3/testbench.sv(1): Using implicit +incdir+C:/questasim64_10.7c/uvm-1.1d/…/verilog_src/uvm-1.1d/src from import uvm_pkg
** Warning: ** while parsing file included at C:/Users/AIR-NBH-1/Desktop/APB 3/testbench.sv(11)
** at apb_scb.sv(35): (vlog-2269) Unterminated string literal continues onto next line 35.
** Warning: ** while parsing file included at C:/Users/AIR-NBH-1/Desktop/APB 3/testbench.sv(11)
** while parsing macro expansion: ‘uvm_info’ starting at apb_scb.sv(35)
** at apb_scb.sv(35): (vlog-2643) Unterminated string literal continues onto next line.
** Warning: ** while parsing file included at C:/Users/AIR-NBH-1/Desktop/APB 3/testbench.sv(11)
** at apb_scb.sv(52): (vlog-2269) Unterminated string literal continues onto next line 52.
** Warning: ** while parsing file included at C:/Users/AIR-NBH-1/Desktop/APB 3/testbench.sv(11)
** while parsing macro expansion: ‘uvm_info’ starting at apb_scb.sv(52)
** at apb_scb.sv(52): (vlog-2643) Unterminated string literal continues onto next line.
** Warning: ** while parsing file included at C:/Users/AIR-NBH-1/Desktop/APB 3/testbench.sv(11)
** at apb_scb.sv(55): (vlog-2269) Unterminated string literal continues onto next line 55.
** Warning: ** while parsing file included at C:/Users/AIR-NBH-1/Desktop/APB 3/testbench.sv(11)
** while parsing macro expansion: ‘uvm_info’ starting at apb_scb.sv(55)
** at apb_scb.sv(55): (vlog-2643) Unterminated string literal continues onto next line.
– Compiling package testbench_sv_unit
– Importing package mtiUvm.uvm_pkg (uvm-1.1d Built-in)
** Warning: apb_seq.sv(16): (vlog-2240) Treating stand-alone use of function ‘randomize’ as an implicit VOID cast.
** Warning: apb_seq.sv(39): (vlog-2240) Treating stand-alone use of function ‘randomize’ as an implicit VOID cast.
** Warning: apb_seq.sv(62): (vlog-2240) Treating stand-alone use of function ‘randomize’ as an implicit VOID cast.
** Warning: apb_seq.sv(67): (vlog-2240) Treating stand-alone use of function ‘randomize’ as an implicit VOID cast.
– Compiling interface apb_if
– Compiling module tb

Top level modules:
tb

10

In reply to Gautami:

Fix your code accordingly.
Your problem was in compiling your code.