svBitVecVal size limit

SystemVerilog
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1

Hi,

Is there a limit of packed array can be passed via DPI to C++?
It seems to be defaulted to 40 bits.
If so, is there any ways to increase it.
Thanks,

2

There is no limit that I am aware of, and 40-bits seems highly unusual as svBitVecVal is just a 32-bit chunk of bits.

3

In reply to dave_59:

Thanks Dave,
I have an example that truncates the array to 40 bits going in both directions between SV and C.
This is not with Questa, so it could be simulator dependent.
Anyway, I’m switching the unpacked array since it seems more natural from C standpoint.
Regards,