In reply to ben@SystemVerilog.us:
[0:$] would actually be easier to handle than the case where you have an upper bound. It would just mean counting up for a and counting down for b. With a fixed bound, the tool also needs to manage the “timeouts”.
In reply to ben@SystemVerilog.us:
[0:$] would actually be easier to handle than the case where you have an upper bound. It would just mean counting up for a and counting down for b. With a fixed bound, the tool also needs to manage the “timeouts”.