[SV LRM 2017] It shall be illegal to declare class method as static lifetime,but code is compiled and simulated successfully?

SystemVerilog
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5

As per section 8.10 static methods of LRM ,

A static method is different from a task with static lifetime. The former refers to the lifetime of the method within the class, while the latter refers to the lifetime of the arguments and variables within the task.

class TwoTasks;
static task t1(); ... endtask // static class method with
// automatic variable lifetime
task static t2(); ... endtask // ILLEGAL: non-static class method with
// static variable lifetime
endclass

but again this works fine with 2 simulator and 1 simulator is giving warnings. still working fine with all simulators.