SV cross coverage with 'intersect' keyword

SystemVerilog
,
1

This is my CG definition:

class my_cov;
  bit [31:0] addr;
  bit [31:0] data;
  bit             wr;
  // ...
  covergroup my_cg;
    cp_addr : coverpoint addr {
      option.auto_bin_max = 0;
      bins a0 = {'h100};
      bins a1 = {'h104};
    }
    cp_data : coverpoint data {
      option.auto_bin_max = 1;
    }
    cp_access : coverpoint wr {
      option.auto_bin_max = 0;
      bins cb_wr = {1};
      bins cb_rd = {0};
    }
    cr_a0_wr : cross cp_addr, cp_data, cp_access {
      option.cross_auto_bin_max = 0;
      bins OFF     = binsof(cp_addr.a0) && binsof(cp_access.cb_wr) && binsof(cp_data) intersect {'h0};
      bins ON1 = binsof(cp_addr.a0) && binsof(cp_access.cb_wr) && binsof(cp_data) intersect {'h1};
      bins ON2 = binsof(cp_addr.a0) && binsof(cp_access.cb_wr) && binsof(cp_data) intersect {'h2};
    }
  endgroup
  // ...
endclass

I expect the below cross-bins for ‘cr_a0_wr’:
‘OFF’ should get hit when → addr = 'h100 & wr = 1 & data = 'h0.
‘ON1’ should get hit when → addr = 'h100 & wr = 1 & data = 'h1.
‘ON2’ should get hit when → addr = 'h100 & wr = 1 & data = 'h2.

But after my simulation, I see all are getting hit even though I had only exercised the scenario for ‘ON1’.

I need help figuring out the mistake in this definition.
TIA.

2

I would like to understand what is your objective using
option.auto_bin_max = 0;

3

For the case of ‘addr’, the bin values are a huge set as it’s a 32-bit variable.
I do not want the autobins to be created. Hence, auto_bin_max is set to 0.

4

Sorry. I had pasted the ‘option.auto_bin_max = 0;’ directly under covergroup definition by mistake.
Now, I corrected the code (moved that line inside cp_addr coverpoint definition)

5

if you are explicitly defining two bins it wont create automatic bins unless specified.

6

cp_data is defined with option.auto_bin_max = 1, it creates a single bin covering all possible values of data. The expression binsof(cp_data) intersect {'h0} does not restrict the bin to only data = 0 but it simply checks if the universal bin includes 0 (which it always does). As a result, all cross bins effectively match whenever addr = 'h100 and wr = 1, regardless of the actual data value. so the correct option would be to define explicit bins for data value. Defining bins(just like below) will resolve the issue.

    cp_data : coverpoint data {
      bins band = {'h0};  // Explicit bin for data=0
      bins khula1 = {'h1};  // Explicit bin for data=1
      bins khula2 = {'h2};  // Explicit bin for data=2
      option.weight = 0;
    }
7

Thank you @whizclips . This clarified my doubt on how all bins got hit.