In reply to chr_sue:
I read the link provided by you and that make sense that SSC is used for reducing EMI.
So why do we need to manipulate clock while running simulation of Serdes data transmission? what is the purpose of SSC enabled clock in simulation ? If I am not wrong, is it just that SSC introduce additional jitter and we have to take care of jitter while transmitting SERDES data over channel we manipulate clock to verify data transmission.correct?