SPI test cases

UVM
1

Hello everyone,

Concerning SPI transfer tests (interrupt/slave select/…etc) during the time SPI transfer happens do we need to constantly read the CTRL reg until GO_BUSY == BUSY?? Or should the APB be kept idle??

If auto slave select and Interrupt enable both are 'h0 the SPI transfer takes, apb_idle_cycles = (div_reg_value+1)(2CTRL[6:0]+1) clock cycles. This can be passed from the sequence as keeping apb idle for. And afterwards read ctrl to check if GO_BUSY == BUSY. This approach is not as flexible as the checking GO_BUSY. But, I presume, the module when under use won’t be constantly read during transfer.

2

In reply to Husni Mahdi:

This would depend on the design of your SPI IP core. You should refer to the IP documentation for additional information on how to use the core.