Simulation +profile : uvm_packer 70% of total simulation time!

UVM
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1

My simulations run super slow. I ran with the +profile switch and the results showed:
uvm_pkg using 75% of total time.
Function uvm_packer was nearly 70% of the total time.
Ouch! Yes, I do a lot of payload packing and unpacking but this seems too high. Most of the transaction members are `uvm_field_int(UVM_DEFAULT | UVM_NOPACK) and implementing functions do_pack(uvm_packer packer) and do_unpack(…) in the usual way.

Is this common? Is there anything I can do to make it faster or pinpoint places where something might have an inefficient implementation. The profile results are very general and only go as detailed as uvm_packer.

Thanks if you know anything. I will keep looking.

2

This is one of the many reasons we strongly discourage the use of the field automation macros. Not only to these macros generate a lot of inefficient code, they also call a lot of inefficient routines in the execution of that code. Write your own packing functions using SystemVerilog’s built-in streaming operators.