Simulation is not passing beyond time 0?

UVM
1

Hi,

I am writing a TB for AHB interface and i see the simulation is not passing beyond time 0. Can anyone help?

2

In reply to rag123:

Hi,
I am writing a TB for AHB interface and i see the simulation is not passing beyond time 0. Can anyone help?
Error

The test got stuck while driving the trans to DUT in the driver:


  task drive (ahb_seq_item req);
    @(posedge HCLK);
    HADDR <= req.HADDR;
    HWRITE <= req.HWRITE;
    HTRANS <= AHB_NON_SEQ;
    @(posedge HCLK iff(HREADY == 1));
    HADDR <= 0;
    HWRITE <= 0;
    HTRANS <= AHB_IDLE;
    if(req.HWRITE == AHB_WRITE) begin
      HWDATA <= req.DATA;
    end
    @(posedge HCLK iff(HREADY == 1));
    if(req.HWRITE == AHB_READ) begin
      req.DATA = HRDATA;
    end
  endtask : drive

You are waiting at the following statement:


@(posedge HCLK iff(HREADY == 1));

However, I noticed that HREADY is not being driven because it seems you don’t have real DUT/design. That is why your code got stuck.

3

In reply to chris90:

Thanks chris :)