Sequence/start_item finish_item--unable to drive pkt to dut

UVM
, ,
1

I have a sequence file, I am trying to send the traffic using start_item and finish item in the ody of the seq file as below.

class puc extennds uvm_sequence;
base_trans req;

function new (string name = "puc");
super.new(name);
endfunction

task body();
req = base_trans :: type_id :: create("req");
req.print()
start_item(req);
assert(req.randomize());
finish_item(req);
endbody
endclass

In the test I am starting the sequencer as
puc.start(env.agent.sequencer);
while I do get the req.print correctly and all the items are getting printed, but I am not able to drive the signals to the dut. I also tried using uvm_create(req)–>randomize–>uvm_send(req), could u possibly suggest as to what may be going wrong. There is no sequencer handle declared in the seq. There is nothing wrong with the driver/sequencer code as it is a legacy ip in the project.

2

In reply to 100rabhh:

Move the req.print statement to after the call to randomize. That will tell you if your legacy IP is set up correctly. Just because you are using legacy code, does not mean you have properly configured it. If the print never happens, you need to debug all the connections and make sure the driver is executing the get_next_item statement.

3

In reply to 100rabhh:

I believe the Sequence class declaration should be ::


class puc extennds uvm_sequence #( base_trans ) ; //  REQ N  RSP  Parameterization

In your code they default to uvm_sequence_item

4

In reply to dave_59:

Hi Dave, the reason I say the driver code is alright is because it is working well with `uvm_do_on_with. The following piece of code is working fine. It is only when I am trying out with above methods is when I am facing issues. when using start_item/finish_item do we explicitly need to provide sequencer info, as far as I know it should pick up the default sequencer, is there any thing that I am missing with regards to sequencer in the earlier method?

class puc extends uvm_sequence;
base_trans req;
`uvm_declare_p_sequencer(sequencer)
function new (string name = "puc");
super.new(name);
endfunction
 
task body();
req = new();
`uvm_do_on_with(req,p_sequencer,{req.addr = 'h480; req.Id == 'h6;});
endbody
endclass
5

In reply to 100rabhh:

Did you try it with the exact same constraint? Did you look at the driver code and see if it is getting the item?

6

In reply to 100rabhh:

In reply to dave_59:
Hi Dave, the reason I say the driver code is alright is because it is working well with `uvm_do_on_with. The following piece of code is working fine. It is only when I am trying out with above methods is when I am facing issues. when using start_item/finish_item do we explicitly need to provide sequencer info, as far as I know it should pick up the default sequencer, is there any thing that I am missing with regards to sequencer in the earlier method?

class puc extends uvm_sequence;
base_trans req;
`uvm_declare_p_sequencer(sequencer)
function new (string name = "puc");
super.new(name);
endfunction
task body();
req = new();
`uvm_do_on_with(req,p_sequencer,{req.addr = 'h480; req.Id == 'h6;});
endbody
endclass

Could you please describe your problem in some more detail.
Is the driver’s run_phase hanging?
Did you try to print your seq_item in the driver?