"send_request failed to cast sequence item" (yes again, sorry)

UVM
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1

Hi,
I know this is an issue that was posted a lot on this forum but I somehow couldn’t find a solution in all the other posts I read about it. I somehow can’t get rid of this error, it seems like I’m giving the proper handle to the sequencer and everything but it still can’t be solved somehow. I hope someone here will understand what’s happening : here’s my code (the log is at the end).

class eth_tx_noc2fifo_env #(integer NOC2FIFO_ETH_MAC_ADDR_WIDTH,integer NOC2FIFO_ETH_ETYPE_WIDTH,integer NOC2FIFO_MPPA_ETHERNET_LANE_NB,integer NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) extends uvm_env;

    typedef eth_tx_noc2fifo_env #(NOC2FIFO_ETH_MAC_ADDR_WIDTH,NOC2FIFO_ETH_ETYPE_WIDTH,NOC2FIFO_MPPA_ETHERNET_LANE_NB,NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) eth_tx_noc2fifo_env_t;
    typedef eth_tx_noc2fifo_master_agent #(NOC2FIFO_ETH_MAC_ADDR_WIDTH,NOC2FIFO_ETH_ETYPE_WIDTH,NOC2FIFO_MPPA_ETHERNET_LANE_NB,NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) eth_tx_noc2fifo_master_agent_t;
    typedef eth_tx_noc2fifo_slave_agent #(NOC2FIFO_ETH_MAC_ADDR_WIDTH,NOC2FIFO_ETH_ETYPE_WIDTH,NOC2FIFO_MPPA_ETHERNET_LANE_NB,NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) eth_tx_noc2fifo_slave_agent_t;

    typedef eth_tx_noc2fifo_bus_monitor #(NOC2FIFO_ETH_MAC_ADDR_WIDTH,NOC2FIFO_ETH_ETYPE_WIDTH,NOC2FIFO_MPPA_ETHERNET_LANE_NB,NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) eth_tx_noc2fifo_bus_monitor_t;

    // Control properties
    protected bit has_bus_monitor = 1;
    protected int unsigned vip_is_master = 1;
    protected string v_name;

    // The following two bits are used to control whether checks and coverage are
    // done both in the bus monitor class and the interface.
    bit intf_checks_enable = 1;
    bit intf_coverage_enable = 1;

    // Components of the environment
    eth_tx_noc2fifo_bus_monitor_t monitor;
    eth_tx_noc2fifo_master_agent_t master;
    eth_tx_noc2fifo_slave_agent_t slave;

    // Provide implementations of virtual methods such as get_type_name and create
    `uvm_component_utils_begin(eth_tx_noc2fifo_env_t)
        `uvm_field_int   (has_bus_monitor,      UVM_ALL_ON)
        `uvm_field_int   (vip_is_master,        UVM_ALL_ON)
        `uvm_field_int   (intf_checks_enable,   UVM_ALL_ON)
        `uvm_field_int   (intf_coverage_enable, UVM_ALL_ON)
        `uvm_field_string(v_name,               UVM_ALL_ON)
    `uvm_component_utils_end

    // new - constructor
    function new(string name, uvm_component parent);
        super.new(name, parent);
    endfunction : new

    // build
    virtual function void build_phase(uvm_phase phase);
        string inst_name;

        super.build_phase(phase);
        if (vip_is_master == 1) begin
            master = eth_tx_noc2fifo_master_agent_t::type_id::create("master", this);
            uvm_config_db#(string)::set(this,"master", "v_name", v_name);
        end
        else begin
            slave = eth_tx_noc2fifo_slave_agent_t::type_id::create("slave", this);
            uvm_config_db#(string)::set(this,"slave", "v_name", v_name);
        end
        if (has_bus_monitor == 1) begin
            monitor = eth_tx_noc2fifo_bus_monitor_t::type_id::create("monitor", this);
            uvm_config_db#(string)::set(this,"monitor", "v_name",  v_name);
        end

    endfunction : build_phase

    function void assign_vi(virtual interface eth_tx_noc2fifo_if #(NOC2FIFO_ETH_MAC_ADDR_WIDTH,NOC2FIFO_ETH_ETYPE_WIDTH,NOC2FIFO_MPPA_ETHERNET_LANE_NB,NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) eth_tx_noc2fifo_i);
        if (vip_is_master == 1)
            master.assign_vi(eth_tx_noc2fifo_i);
        else
            slave.assign_vi(eth_tx_noc2fifo_i);
        if (has_bus_monitor == 1)
            monitor.assign_vi(eth_tx_noc2fifo_i);

   endfunction : assign_vi

endclass : eth_tx_noc2fifo_env

`endif

class eth_tx_noc2fifo_master_agent #(integer NOC2FIFO_ETH_MAC_ADDR_WIDTH,integer NOC2FIFO_ETH_ETYPE_WIDTH,integer NOC2FIFO_MPPA_ETHERNET_LANE_NB,integer NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) extends uvm_agent;

    typedef eth_tx_noc2fifo_master_agent     #(NOC2FIFO_ETH_MAC_ADDR_WIDTH,NOC2FIFO_ETH_ETYPE_WIDTH,NOC2FIFO_MPPA_ETHERNET_LANE_NB,NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) eth_tx_noc2fifo_master_agent_t;
    typedef eth_tx_noc2fifo_master_driver    #(NOC2FIFO_ETH_MAC_ADDR_WIDTH,NOC2FIFO_ETH_ETYPE_WIDTH,NOC2FIFO_MPPA_ETHERNET_LANE_NB,NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) eth_tx_noc2fifo_master_driver_t;
    typedef eth_tx_noc2fifo_master_sequencer #(NOC2FIFO_ETH_MAC_ADDR_WIDTH,NOC2FIFO_ETH_ETYPE_WIDTH,NOC2FIFO_MPPA_ETHERNET_LANE_NB,NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) eth_tx_noc2fifo_master_sequencer_t;

    protected uvm_active_passive_enum is_active = UVM_ACTIVE;

    protected string v_name;

    eth_tx_noc2fifo_master_driver_t    driver;
    eth_tx_noc2fifo_master_sequencer_t sequencer;

    // Provide implementations of virtual methods such as get_type_name and create
    `uvm_component_utils_begin(eth_tx_noc2fifo_master_agent_t)
        `uvm_field_enum(uvm_active_passive_enum, is_active, UVM_ALL_ON)
        `uvm_field_string(v_name,                           UVM_ALL_ON)
    `uvm_component_utils_end

    // new - constructor
    function new(string name, uvm_component parent);
        super.new(name, parent);
    endfunction : new

    // build
    virtual function void build_phase(uvm_phase phase);
        super.build_phase(phase);
        if(is_active == UVM_ACTIVE) begin
            driver = eth_tx_noc2fifo_master_driver_t::type_id::create("driver", this);
            sequencer = eth_tx_noc2fifo_master_sequencer_t::type_id::create("sequencer", this);
            uvm_config_db#(string)::set(this,"driver", "v_name", v_name);
        end
    endfunction : build_phase

    // connect
    function void connect_phase(uvm_phase phase);
        if(is_active == UVM_ACTIVE) begin
            driver.seq_item_port.connect(sequencer.seq_item_export);
        end
     endfunction : connect_phase

    // assign the virtual interface
    function void assign_vi(virtual interface eth_tx_noc2fifo_if #(NOC2FIFO_ETH_MAC_ADDR_WIDTH,NOC2FIFO_ETH_ETYPE_WIDTH,NOC2FIFO_MPPA_ETHERNET_LANE_NB,NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) eth_tx_noc2fifo_mi);
        if (is_active == UVM_ACTIVE) begin
            sequencer.assign_vi(eth_tx_noc2fifo_mi);
            driver.assign_vi(eth_tx_noc2fifo_mi);
        end
    endfunction : assign_vi

endclass : eth_tx_noc2fifo_master_agent

`endif

  class eth_tx_noc2fifo_master_driver #(integer NOC2FIFO_ETH_MAC_ADDR_WIDTH,integer NOC2FIFO_ETH_ETYPE_WIDTH,integer NOC2FIFO_MPPA_ETHERNET_LANE_NB,integer NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) extends uvm_driver #(eth_tx_noc2fifo_transfer #(NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH));

    typedef eth_tx_noc2fifo_master_driver #(NOC2FIFO_ETH_MAC_ADDR_WIDTH,NOC2FIFO_ETH_ETYPE_WIDTH,NOC2FIFO_MPPA_ETHERNET_LANE_NB,NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) eth_tx_noc2fifo_master_driver_t;
    typedef eth_tx_noc2fifo_transfer #(NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) eth_tx_noc2fifo_transfer_t;

    // The virtual interface used to drive and view HDL signals.
    protected virtual eth_tx_noc2fifo_if #(NOC2FIFO_ETH_MAC_ADDR_WIDTH,NOC2FIFO_ETH_ETYPE_WIDTH,NOC2FIFO_MPPA_ETHERNET_LANE_NB,NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) eth_tx_noc2fifo_mi;

    protected string v_name;

    logic [127:0] noc_header;

    // Provide implementations of virtual methods such as get_type_name and create
    `uvm_component_utils_begin(eth_tx_noc2fifo_master_driver_t)
    `uvm_field_string(v_name,  UVM_ALL_ON)
    `uvm_component_utils_end

    // new - constructor
    function new(string name, uvm_component parent);
      super.new(name, parent);
  endfunction : new

    // assign the virtual interface
    function void assign_vi(virtual interface eth_tx_noc2fifo_if #(NOC2FIFO_ETH_MAC_ADDR_WIDTH,NOC2FIFO_ETH_ETYPE_WIDTH,NOC2FIFO_MPPA_ETHERNET_LANE_NB,NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) eth_tx_noc2fifo_mi);
        this.eth_tx_noc2fifo_mi = eth_tx_noc2fifo_mi;
    endfunction : assign_vi

    // run phase
    virtual task run_phase(uvm_phase phase);
    `uvm_info(get_type_name(), $psprintf("Starting driver run"), UVM_LOW)
    fork
        reset_signals();
        get_and_drive();
    join
endtask : run_phase
endclass


class eth_tx_noc2fifo_basic_seq #(int NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) extends eth_tx_noc2fifo_master_base_seq #(NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH);

    `uvm_object_param_utils(eth_tx_noc2fifo_basic_seq #(NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH))

    // new - constructor
    function new(string name="eth_tx_noc2fifo_basic_seq");
        super.new(name);
    endfunction : new

    virtual task body();
    $display("seq body");

    $cast(trans, create_item(eth_tx_noc2fifo_transfer_t::type_id::get(), m_sequencer, "trans"));

    start_item(trans);

    
    finish_item(trans); // <-- THE PROBLEM IS HERE
    endtask
endclass : eth_tx_noc2fifo_basic_seq


class eth_tx_noc2fifo_master_sequencer #(int NOC2FIFO_ETH_MAC_ADDR_WIDTH,int NOC2FIFO_ETH_ETYPE_WIDTH,int NOC2FIFO_MPPA_ETHERNET_LANE_NB,int NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) extends uvm_sequencer #(eth_tx_noc2fifo_transfer #(NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH));

    typedef eth_tx_noc2fifo_master_sequencer #(NOC2FIFO_ETH_MAC_ADDR_WIDTH,NOC2FIFO_ETH_ETYPE_WIDTH,NOC2FIFO_MPPA_ETHERNET_LANE_NB,NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) eth_tx_noc2fifo_master_sequencer_t;
    
    typedef eth_tx_noc2fifo_transfer #(NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) eth_tx_noc2fifo_transfer_t;

    // The virtual interface used to drive and view HDL signals.
    protected virtual eth_tx_noc2fifo_if #(NOC2FIFO_ETH_MAC_ADDR_WIDTH,NOC2FIFO_ETH_ETYPE_WIDTH,NOC2FIFO_MPPA_ETHERNET_LANE_NB,NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) eth_tx_noc2fifo_mi;

    // Provide implementations of virtual methods such as get_type_name and create
    //`uvm_sequencer_utils(eth_tx_noc2fifo_master_sequencer_t)
    `uvm_component_utils(eth_tx_noc2fifo_master_sequencer_t)

    // new - constructor
    function new(string name, uvm_component parent);
        super.new(name, parent);
        //`uvm_update_sequence_lib_and_item(eth_tx_noc2fifo_transfer_t)
    endfunction : new

    // assign the virtual interface
    function void assign_vi(virtual interface eth_tx_noc2fifo_if #(NOC2FIFO_ETH_MAC_ADDR_WIDTH,NOC2FIFO_ETH_ETYPE_WIDTH,NOC2FIFO_MPPA_ETHERNET_LANE_NB,NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) eth_tx_noc2fifo_mi);
        this.eth_tx_noc2fifo_mi = eth_tx_noc2fifo_mi;
    endfunction : assign_vi

endclass : eth_tx_noc2fifo_master_sequencer


virtual class tb_mppa_ethernet_tx_fifo_tests extends uvm_test;
    `uvm_component_utils(tb_mppa_ethernet_tx_fifo_tests)

    typedef ethernet_tx_fifo_refmodel #(ETH_TX_FIFO_NB,ETH_TX_MAC_LANE_NB) ethernet_tx_fifo_refmodel_t;
    typedef eth_tx_noc2fifo_env #(ETH_MAC_ADDR_WIDTH, ETH_ETYPE_WIDTH, MPPA_ETHERNET_LANE_NB, MPPA_ETHERNET_DATA_WIDTH) ethernet_tx_noc2fifo_env_t;

    uvm_table_printer printer;

    ethernet_tx_noc2fifo_env_t noc2fifo_vip_env;

     // Instantiate virtual interfaces of VIPs
    virtual interface eth_tx_noc2fifo_if #(ETH_MAC_ADDR_WIDTH,ETH_ETYPE_WIDTH,MPPA_ETHERNET_LANE_NB,MPPA_ETHERNET_DATA_WIDTH) vir_noc2fifo_intf[ETH_TX_FIFO_NB];
    
    function new(string name = "tb_mppa_ethernet_tx_fifo_tests", uvm_component parent=null);
        super.new(name,parent);
    endfunction : new

    function void build_phase(uvm_phase phase);
        super.build_phase(phase);
        // Create noc2fifo environnement
        noc2fifo_vip_env = ethernet_tx_noc2fifo_env_t::type_id::create("noc2fifo_vip_env", this);
        uvm_config_db#(string)::set(this,"noc2fifo_vip_env", "v_name", "NOC2FIFO");
        uvm_config_db#(int)::set(this, "noc2fifo_vip_env", "vip_is_master", 1);

        printer = new();
        printer.knobs.depth = 3;

    endfunction : build_phase

    function void end_of_elaboration();
        super.end_of_elaboration();
        `uvm_info(get_type_name(), $psprintf("\nPrinting the test topology :\n%s", this.sprint(printer)), UVM_LOW)
    endfunction : end_of_elaboration;

    function void connect();
        super.connect();
        // Connect noc2fifo interface
        if(uvm_config_db#(virtual eth_tx_noc2fifo_if #(ETH_MAC_ADDR_WIDTH,ETH_ETYPE_WIDTH,MPPA_ETHERNET_LANE_NB,MPPA_ETHERNET_DATA_WIDTH))::get(this, "", {"noc2fifo_vif", 0}, vir_noc2fifo_intf[0]))
            `uvm_info(get_type_name(),$psprintf("noc2fifo virtual interface found"), UVM_HIGH);
        `uvm_info(get_type_name(),$psprintf("connecting noc2fifo env and virt intf"), UVM_HIGH)
        noc2fifo_vip_env.assign_vi(vir_noc2fifo_intf[0]);

    endfunction : connect

    task run_phase(uvm_phase phase);
        super.run_phase(phase);
    endtask : run_phase

endclass : tb_mppa_ethernet_tx_fifo_tests

class eth_tx_fifo_simple_test extends tb_mppa_ethernet_tx_fifo_tests;
    `uvm_component_utils(eth_tx_fifo_simple_test)

    typedef eth_tx_noc2fifo_valid_seq #(MPPA_ETHERNET_DATA_WIDTH) eth_tx_noc2fifo_valid_seq_t;

    function new(string name = "eth_tx_fifo_simple_test", uvm_component parent=null);
        super.new(name,parent);
    endfunction : new

    function void build_phase(uvm_phase phase);
        super.build_phase(phase);
    endfunction : build_phase

    function void end_of_elaboration();
        super.end_of_elaboration();
    endfunction : end_of_elaboration;

    eth_tx_noc2fifo_basic_seq #(MPPA_ETHERNET_DATA_WIDTH) base_seq;

    task run_phase(uvm_phase phase);

        `uvm_info(get_type_name(), $psprintf("Starting test eth_tx_fifo_simple_test"), UVM_LOW)

        super.run_phase(phase);

        uvm_test_done.raise_objection(this);

        base_seq = eth_tx_noc2fifo_basic_seq #(MPPA_ETHERNET_DATA_WIDTH)::type_id::create("base_seq");

        base_seq.start(noc2fifo_vip_env.master.sequencer);

        uvm_test_done.drop_objection(this);
        
    endtask : run_phase

endclass : eth_tx_fifo_simple_test

Here is my error :

UVM_FATAL @ 5000: uvm_test_top.noc2fifo_vip_env.master.sequencer [sequencer] send_request failed to cast sequence item

Here is the test topology :

------------------------------------------------------------------------------

Name Type Size Value

------------------------------------------------------------------------------

uvm_test_top eth_tx_fifo_simple_test - @418

noc2fifo_vip_env eth_tx_noc2fifo_env_t - @430

master eth_tx_noc2fifo_master_agent_t - @643

driver eth_tx_noc2fifo_master_driver_t - @666

sequencer eth_tx_noc2fifo_master_sequencer_t - @692

is_active uvm_active_passive_enum 1 UVM_ACTIVE

v_name string 8 NOC2FIFO

monitor eth_tx_noc2fifo_bus_monitor_t - @653

v_name string 8 NOC2FIFO

has_bus_monitor integral 1 'h1

vip_is_master integral 32 'h1

intf_checks_enable integral 1 'h1

intf_coverage_enable integral 1 'h1

v_name string 8 NOC2FIFO

------------------------------------------------------------------------------

2

In reply to alegouis:

This line is the cause for your problem:

$cast(trans, create_item(eth_tx_noc2fifo_transfer_t::type_id::get(), m_sequencer, "trans"));

eth_tx_noc2fifo_transfer_t

is a type and not a variable

3

In reply to chr_sue:

Hi chr_sue, thanks for the answer. Sadly this is not the answer I’m looking for, the create_item is always used like that in all of our VIPs. I tried switching “eth_tx_noc2fifo_transfer_t” to a variable (trans) but I get this error :

** at .../vip/eth_tx_noc2fifo/sv//eth_tx_noc2fifo_master_seq_lib.sv(101): (vlog-2164) Class or package 'trans' not found.
4

In reply to alegouis:

I might not see your whole code. But if you do not have avariable of thius type it is not correct. Your last error message is only an indication you might not co9mpile in the write order or have another compiling issue.

5

I guess it is incompatible type of sequence item that is creating problem.can you write this typedef at starting of sequence file and check?

typedef eth_tx_noc2fifo_transfer #(NOC2FIFO_MPPA_ETHERNET_DATA_WIDTH) eth_tx_noc2fifo_transfer_t;