Seminar Notification: Low Power Verification Forum - Santa Clara, CA

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Are you a Design or Verification Engineer or Manager interested in Low Power? Please join us for the recently recorded Low Power Verification Forum. Overview: This forum will explore the new and unique low-power coverage methodologies that enable designers to verify and track how well they have tested their power management architecture. It will also show how to track not only metrics for how much power is used in the RTL, but also how much power is still being wasted and has potential to be reduced for IP qualification. Finally, it will step through how to bring real power scenarios into both your power measurement and management coverage metrics to provide the final phase of power verification and analysis. Featured Guest Presenter: Sriram Hariharan, Principal Engineer/Manager, Qualcomm, Inc. Sessions: Introduction and Overview Industry Advancements Required to Close the Power Management Verification Gap Deploying A Metrics Driven Low Power Methodology for Your RTL IP Low Power Verification & Analysis with Emulation Low Power Considerations for Verification Productive Low Power Debug Across All Engines and Flows Learn more and view.