hi all
I have a question.How does the register model implement polling register reading? like until the value of this status register is 0.
In reply to yangbo:
The UVM register model has callbacks that you can use. This is a fairly old presentation, but should give you the pointer you need. http://www.testandverification.com/DVClub/19_Nov_2012/9%20-%20Dialog%20-%20Steve%20Holloway%20(User%20Paper).pdf