In reply to chr_sue:
Thanks for your reply.
So, since uvm_reg_hw_reset_seq performs physical register accesses, the initialization of the model is done through actual register access as I was guessing, isn’t it?
Am I missing something?
In reply to chr_sue:
Thanks for your reply.
So, since uvm_reg_hw_reset_seq performs physical register accesses, the initialization of the model is done through actual register access as I was guessing, isn’t it?
Am I missing something?