Register adaptor completing sequence problems

UVM
,
8

In reply to Phill_Ferg:

I think i am a little close to understanding the code adaptor. When i look at the example code in a sequence that is not using the register model. The body task looks like this…

#
virtual task body();
			amiq_apb_master_drv_item master_seq_item = amiq_apb_master_drv_item::type_id::create("master_seq_item");

			start_item(master_seq_item);

			if(!(master_seq_item.randomize() with {
							master_seq_item.selected_slave < p_sequencer.agent_config.get_number_of_slaves();
							address == master_address;
							rw == master_rw;
							data == master_data;
						})) begin
				`uvm_fatal("AMIQ_APB_NOSEQITEM_MSEQ_ERR", "The sequence item could not be generated");
			end

			finish_item(master_seq_item);
		endtask

however in the adaptor i am dealing with the reg2bus function there is this.


  virtual function uvm_sequence_item reg2bus(const ref uvm_reg_bus_op rw);
    amiq_apb_master_simple_seq transaction = amiq_apb_master_simple_seq::type_id::create("transaction");

    `uvm_info(get_id(), $sformatf("running inside the adaptor"), UVM_LOW)

    assert (transaction.randomize() with {
      master_address == rw.addr;
      master_data == rw.data;
    }) else
    `uvm_fatal(get_id(), "Could not randomize amiq_apb_drv_item_master");

    if(rw.kind == UVM_WRITE) begin
      transaction.master_rw = WRITE;
    end
    else begin
      transaction.master_rw = READ;
    end

    return transaction;
  endfunction

I realise this is being doing in the uvm_reg_map class. So i am at a loss as to why the tlm handshake isn’t completing. If the sequencer appears ok, am i looking at the driver again?