Register Access Automation

In reply to RushilMithani_37:
Hi Rushil
UVM RAL model provides below predefined sequences to perform Registers attribute check

uvm_reg_access_seq - R/W permissions
uvm_reg_bit_bash_seq - Walking 1’s and 0’s
uvm_hw_reset_seq - Register reset values

I suggest you to use these sequences to to check Registers.

Thanks
Sreeni