Race condition between write() in UVM scoreboard

In reply to chr_sue:

Actually, no. I think we both are not on the same page here. Let’s say the virtual sequence sends reads, writes with random delays in between such that for a given clock, you can hit any of the 4 scenarios:

  1. only read
  2. only write
  3. write and read together.
  4. neither read nor write

NOTE that i have 2 interfaces, not 1.

I want to use this virtual sequence because it’s capable of doing ALL OF THE ABOVE.
Case 3) is a valid scenario, and I’m able to drive that.

My question here is, how do I change the monitor/driver/scoreboard for case 3) knowing that my DUT handles write → read when both are presented during the same cycle. If I just use the code above, there is no guarantee that the ap.write() of rd_mon gets called after the ap.write() of wr_mon.

If ap.write() of rd_mon gets called before the ap.write() of wr_mon, then my scoreboard will return the data prior to the write, and DUT would return the data after the write. Do you see the problem I’m facing?