Question regarding Phasing N TLM Port with max_size 2

UVM
,
2

In reply to MICRO_91:

  1. Your problems stem from the fact that there are no delays in the run_phase between the raise and drop. The run_phase is over at time 0 and ready to proceed, but the extract_phase won’t begin until the main phase ends.
  2. There’s a requirement that there must be some blocking delay between the raise and drop. Otherwise you get this kind of error message.
  3. We recommend just using the run_phase which avoids many issues including the ones you see here.
  4. Same as Q2
  5. Same as Q2
  6. Sorry, uncharted territory.