Question on simulation performance

SystemVerilog
1

Hi,

I have an environment in which I have to create n number of objects depending on a text file and set parameters for each object.
There are two ways of doing it:

  1. Write a perl script to read the text file, create a new text file(which would be .sv file) which contains instantiations of these objects, and all the relevant parameter settings for each object dumped into that file (the file turned out to be some 5,00,000+lines). Include this file into a class, compile and run the simulation.
  2. Another way is to dynamically build the classes using system verilog file handling function calls during run-time, which I was able to accomplish in 100 lines.

Can some one please clarify which one would show improved simulation performance, and any pros and cons of the above two methods (static vs dynamic creation).

Thanks in advance,
Sailaja.

2

It’s going top be hard to give you a definitive answer about performance without knowing the complexity of reading the file, the complexity of the data structures you need to create, and how you intend to use these objects. In general you are better off creating objects as you need them, and potentially re-using existing objects than creating a significantly large number of objects all at once.

3

In reply to dave_59:

Hi Dave,

Thanks for the reply.

This is about register database creation.
The text file is about 1000 lines with each line containing 10 words at max (each line is about a field).
And whether I create statically or at run-time, I need to create an object for each field (and register and regblock).
But if I do statically, the .sv file (created out of perl script) is 1000 * 20 lines big, and I include this into a class.
However, if I create objects run-time, I create an associative array of handles and all the configuration part, I do via one function call (.configure()).
Now I have doubt on which approach should I recommend in my TB: I prefer dynamic creation of register model rather than statically parsing a text file, dumping the relevant elements into a .sv file and including into a class.
I think this would speed up simulation a bit, because now it does not need to parse a 20* 1000 line .sv file? Can you please comment on this?

I know about register automation tools/scripts, but we do not intend to use any of them. So please do not recommend them.

Thanks in advance,
Sailaja.

4

In reply to Sailaja:

Hi Dave,

I request you to please comment.
Currently I do not have any definite metric on performance improvements, and I would like to listen from experts like you.

  1. Creating a register database from a simple text file (which contains a line per field, and 8-10 words) during run-time
  2. Or Creating a million line file containing field & regclass extensions via perl script and doing a `include of this file in a sv class.

Please suggest on which of these is better.

5

In reply to Sailaja:

Sailaja,

It is still very hard for anyone to answer your question without seeing any code. Parsing a file or reading a file does not take that much time. It’s the execution of the resulting code that takes most of the time.

6

In reply to dave_59:

Hi Dave,

Thank you very much for the answer.
I was able to modify my test bench environment slightly and was able to see significant reduction in simulation time when compared to the conventional approach that we had followed till now.

Thanks,
Sailaja.