In reply to Abhyudha:
In the above code snippet issue is at variable type declaration of “c” and “d”.
Note: reg elements cannot be connected to the output port of a module instantiation. So you need to declare as below…
wire c;
wire d;
In reply to Abhyudha:
In the above code snippet issue is at variable type declaration of “c” and “d”.
Note: reg elements cannot be connected to the output port of a module instantiation. So you need to declare as below…
wire c;
wire d;