Printing topology in top module

UVM
1

I tried to print the uvm topology from top module. The program compiled successfully but did not print topology. Can u give me a reason?

module top;

import uvm_pkg::;
import pkg::;

bit clk;

clock generation
always #5 clk=~clk;

intf inf (clk);

desgn dut (inf);

initial begin
run_test(“my_test”);
uvm_top.print_topology();
end

endmodule

2

In reply to jwl1806:

It is not a good place to print the topology from the toplevel module. It might not be ready directly after calling run_test.

You could include a trigger in the end_of_elaboration_phase of the test that indicates your dynamic part of the testbench is ready. And you have to wit for this trigger in the toplevel module.

3

In reply to chr_sue:

This question was asked to me in an interview. And the interviewer wanted to know the reason why it will not even though it was compiled .

4

In reply to jwl1806:

The class-based einironment will be created during run-time 0 and not whilst compiling.

5

In reply to jwl1806:

You can easily try running this and it will tell you the answer.

6

It is compiled without getting any error message. even it is generating the exact stimulus
but topology is not printing

my answer is uvm class is dynamic in nature and the top module is static in nature.and after creating the component and connecting the components only will build the topology all are happening in zero simulation time.

if anything wrong. please help me solve this

7

In reply to mada saimanasa:

try replacing uvm_top.print_topology() with $display(“hello”);

8

//top module

initial
begin
$display(“hello”);
run_test(“test”);
$display("hello1);
end

here hello is printing but hello1 is not printing

9

In reply to mada saimanasa:

What does that tell you?

10

In reply to dave_59:

In reply to mada saimanasa:
What does that tell you?

May be the simulation gets terminated when the underlying phases in the test.env hierarchy end and the statements after the run_test will never get executed?
It is just my guess after reading the other comments.

11

In reply to mbhat:

Correct. You should see a $finish message coming from the UVM.

12

In reply to dave_59:

Thanks, Dave.

13

Hey, dave_59. Can you explain in a little bit more detail?.thanks

14

The following should work, probably.

initial
  uvm_pkg::run_test(“my_test”);

initial begin
  uvm_pkg::uvm_wait_for_nba_region();
  uvm_pkg::uvm_top.print_topology();
end
15 
uvm_top.finish_on_completion = 0;

// Start the test
run_test("my_test");

uvm_top.print_topology();
$finish;