In reply to chr_sue:
I was a little unclear in my wording. All of my predictors are transaction-based models written in SV. My point was that bus activity (picked up by monitors) is the sole driver for the predictors; the predictors do not receive information from other IP, such as a different predictor via analysis port, etc.
If my predictors cannot talk to each other, to whom should by chip level predictor communicate with as it attempts to gather status information block level components?