Polymorphism

SystemVerilog
,
2

In reply to verif_learner:

But the call to func2 inside DerivedC::func1 is bound at compile time to DerivedC::func2.

It might help to think of how the code looks if you move the functions outside the class

module poly_case4;
 
class BaseC;
extern virtual function void func1:
extern         function void func2:
endclass
function void BaseC::func1;
    $display ("func1 in BaseC");
    func2; // bound as BaseC::func2;
endfunction
 
function void BaseC::func2;
    $display ("func2 in BaseC");
endfunction
 
class DerivedC extends BaseC;
extern virtual function void func1:
extern         function void func2: 
endclass
function void DerivedC::func1;
    $display ("func1 in DerivedC");
    func2; // bound as DerivedC::func2;
  endfunction
 
function void DerivedC::func2;
    $display ("func2 in DerivedC");
endfunction
 
BaseC    P1 ;
DerivedC P2 = new;
 
initial begin
  P1 = P2;
  P1.func1;
end
 
endmodule