Performance problem

SystemVerilog
1

Hi All,
I have a question about solve before.
As I know solve before should only affect the probability of the combination
But some one says solve before will affect the simulator performance(ex: spend more time to generate the result).
Would you explain the reason and give me a example?
Thanks a lot!

2

Performance could go either way. Constraint solving is not an exact science. Although it’s easier to think of the solver finding the total solution space and then picking a random solution, that is not what gets implemented. And this Siemens sponsored public forum is not for discussing tool specific issues.

3

thanks for reply.
what do you mean that is not what gets implemented?
for example

  rand bit       a; rand bit [3:0] b;
  constraint test { (a == 1) -> b == 0; solve a before b;}

If i add solve before, running time should be same as not adding solve before?

4

Take a slightly more complex example

rand bit [1:0] a; 
rand bit [3:0] b;
constraint test { 
    (a == 1) -> b == 0; 
    (a == 2) -> b == 1; 
    b > 0;
    solve a before b;
}

Even though we added solve a before b, we need to know that b cannot be 0, thus a cannot be 1, thus the only valid values to pick for a are 0,2, and 3. If we increase the complexity of this example even further (adding more variables, constraints, and widths), it becomes increasingly difficult to know what the valid values for a could be. The solver is not going to build an exhaustive list of all possible solutions to know what can be the choices for a.

How this might affect the performance of your tool needs to be taken up with your tool vendor.

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