Hi All,
I have four SV base classes(A reference model).
I have instantiated above SV classes into my top_predictor( which is uvm base class and it is extended from uvm_component).
Within the run_phase of my top_predictor,I wanted to call and execute all SV base classes task parallelly.
Note: Two SV base classes depends on clk1 and another 2 SV base classes depends on clk2.
How should I overcome this issues. Please suggest.
Thanks
Priyanka
In reply to Priya_Verif_engg:
You need to provide more information about your requirements because your question isn’t clear.
All components in your UVM environment (except for drivers/monitors) are required to be transaction based, with no clock requirements. Your predictor(s) should utilize analysis ports and perform all analysis and predictions when transactions are written. It is very rare to use the run_phase() in a predictor/scoreboard.
In reply to Priya_Verif_engg:
I am not sure I fully understand the problem here. But if top_predictor is a uvm_component() you can declare a run_phase() task. Why not just use a fork-join inside this run_phase() wherein you trigger all the base class methods, separately one per thread. (assuming that you have access to the handle of the 4 objects inside the top_predictor)
In reply to cgales:
In reply to Priya_Verif_engg:
You need to provide more information about your requirements because your question isn’t clear.
All components in your UVM environment (except for drivers/monitors) are required to be transaction based, with no clock requirements. Your predictor(s) should utilize analysis ports and perform all analysis and predictions when transactions are written. It is very rare to use the run_phase() in a predictor/scoreboard.
Hi cgales,
Thanks for your replay,
Instead of run_phase in top_predictor ,what should be the other way to call derived class(SV base class) methods.
In reply to logie:
In reply to Priya_Verif_engg:
I am not sure I fully understand the problem here. But if top_predictor is a uvm_component() you can declare a run_phase() task. Why not just use a fork-join inside this run_phase() wherein you trigger all the base class methods, separately one per thread. (assuming that you have access to the handle of the 4 objects inside the top_predictor)
Hi Logie, I have already implemented in this manner, but am missing the 1st 32bit data ,please see the below snippet code for your reference.
// Inside run_phase of top_predictor
fork
begin
@(posedge vif.i_Pixel_clock) begin //pixel clock for sync_predictor and pixel_pack SV class
sync_pre.i_a_start <= a818_tx_frm.i_A_start_stop; // Assigning value to derived class variable
pxl_pack.h_count <= sync_pre.o_H_Sync ; // Assigning syn_predictor class value to pixel_pack class variable.
pxl_pack.v_count <= sync_pre.o_V_Sync ;// Assigning syn_predictor class value to pixel_pack class variable.
if(pxl_que.size()>0) begin // from write method, We stored pixel data in to this queue
a818_tx_pxl <= pxl_que.pop_back(); // from queues popping back to sequence item container
pxl_pack.pixel_valid <= a818_tx_pxl.i_pixel_enable ; Assigning values from seuence item container to pixel_pack class variable.
pxl_pack.i_pixel_data <= a818_tx_pxl.i_pixel_data ;
end
begin
sync_pre.sync_run_task(); // Sync_predictor task
pxl_pack.pix_run_task(); // pixel_pack task
end
begin
@(posedge i_sys_clock) begin ////system clock for framer & encoder predictor SV class
frm_hdl.frame_run_task(); // framer task
end
end
join
In reply to Priya_Verif_engg:
Obviously it is difficult to understand the problem by just looking at the code snippet.
However, I did a couple of simple things. I reformatted the code. I get a suspicion
that the fork-join structure may be incorrect. Please review the following formatted code
and recheck if the fork join structure is fine. (I am surprised you did not a compilation error).
Secondly, you seem to have used NBAs in the code. It appears that you are assigning
some member variables inside a class object. Why are these NBAs. Please review and
make sure that this is really the intent here.
fork
begin
@(posedge vif.i_Pixel_clock)
begin //pixel clock for sync_predictor and pixel_pack SV class
sync_pre.i_a_start <= a818_tx_frm.i_A_start_stop; // Assigning value to derived class variable
pxl_pack.h_count <= sync_pre.o_H_Sync ; // Assigning syn_predictor class value to pixel_pack class variable.
pxl_pack.v_count <= sync_pre.o_V_Sync ;// Assigning syn_predictor class value to pixel_pack class variable.
if(pxl_que.size()>0)
begin // from write method, We stored pixel data in to this queue
a818_tx_pxl <= pxl_que.pop_back(); // from queues popping back to sequence item container
pxl_pack.pixel_valid <= a818_tx_pxl.i_pixel_enable ; Assigning values from seuence item container to pixel_pack class variable.
pxl_pack.i_pixel_data <= a818_tx_pxl.i_pixel_data ;
end
begin
sync_pre.sync_run_task(); // Sync_predictor task
pxl_pack.pix_run_task(); // pixel_pack task
end
begin
@(posedge i_sys_clock)
begin ////system clock for framer & encoder predictor SV class
frm_hdl.frame_run_task(); // framer task
end
end
join
Logie Ramachandran
Verikwest Systems Inc