Hello,
I am trying to port my project from OVM to UVM. Firstly, I renamed all instances of ovm_
to uvm_. Secondly, I converted the project to UVM phasing API. Then I am able to fully load the
design in the simulator (QuestaSim10.2b, Linux, RedHat5, 64-bit). However, as soon as I
start the run, I receive the errors below. Could somebody please suggest how to resolve that?
# ** Fatal: (vsim-160) /dsk1/SLC5/QuestaSim10.2b/questasim/verilog_src/uvm-1.1d/src/dpi/uvm_svcmd_dpi.svh(27): Null foreign function pointer encountered when calling 'uvm_dpi_get_next_arg_c'
# Time: 0 ps Iteration: 0 Process: /uvm_pkg/#INITIAL#619 File: /dsk1/SLC5/QuestaSim10.2b/questasim/verilog_src/uvm-1.1d/src/dpi/uvm_svcmd_dpi.svh
# Fatal error in Module uvm_pkg at /dsk1/SLC5/QuestaSim10.2b/questasim/verilog_src/uvm-1.1d/src/dpi/uvm_svcmd_dpi.svh line 27
#
# HDL call sequence:
# Stopped at /dsk1/SLC5/QuestaSim10.2b/questasim/verilog_src/uvm-1.1d/src/dpi/uvm_svcmd_dpi.svh 27 Module uvm_pkg
# called from /dsk1/SLC5/QuestaSim10.2b/questasim/verilog_src/uvm-1.1d/src/dpi/uvm_svcmd_dpi.svh 32 Module uvm_pkg
# called from /dsk1/SLC5/QuestaSim10.2b/questasim/verilog_src/uvm-1.1d/src/base/uvm_cmdline_processor.svh 245 Function uvm_pkg/uvm_cmdline_processor::new
# called from /dsk1/SLC5/QuestaSim10.2b/questasim/verilog_src/uvm-1.1d/src/base/uvm_cmdline_processor.svh 61 Function uvm_pkg/uvm_cmdline_processor::get_inst
# called from /dsk1/SLC5/QuestaSim10.2b/questasim/verilog_src/uvm-1.1d/src/base/uvm_root.svh 306 Function uvm_pkg/uvm_root::new
# called from /dsk1/SLC5/QuestaSim10.2b/questasim/verilog_src/uvm-1.1d/src/base/uvm_root.svh 286 Function uvm_pkg/uvm_root::get
# called from /dsk1/SLC5/QuestaSim10.2b/questasim/verilog_src/uvm-1.1d/src/base/uvm_root.svh 246 Module uvm_pkg
#
Dave, thank you very much for your reply!
I did read the article you suggested before posting here.
Were you implying in your response that I should add
+UVM_USE_OVM_RUN_SEMANTIC switch in vsim command?
I did do that, but I get the same error.
However, I left in +incdir+(UVM_HOME)/src, (UVM_HOME)/src/uvm_pkg.sv
in the vlog command. I understood the article so that this is not really
needed. The article says “we don’t have to specify”. Did I misinterpret that?
Nevertheless, I tried leaving out incdir+(UVM_HOME)/src, (UVM_HOME)/src/uvm_pkg.sv
but then the compilation resulted in many errors, such as the ones below.
And I haven’t figured out what is the reason for that.
# QuestaSim-64 vlog 10.2b Compiler 2013.05 May 16 2013
# -- Compiling package pix_pkg
# -- Importing package uvm_pkg (uvm-1.1d Built-in)
# ** Error: ../TB/pix/sv/pix_pkg.sv(36): Cannot find `include file "uvm_macros.svh" in directories:
# ../TB/pix/sv, ../TB/cmd/sv, ../TB/cmd_alt/sv, ../TB/receive/sv, ../TB/manual/sv, ../TB/top_tb/sv, ../TB/top_tb/tests, ../TOP/rtl, /dsk1/SLC5/QuestaSim10.2b/questasim/ovm-2.1.2/../verilog_src/ovm-2.1.2/src
# ** Error: ../TB/pix/sv/pix_transfer.sv(64): (vlog-2163) Macro `uvm_object_utils_begin is undefined.
# ** Error: ../TB/pix/sv/pix_transfer.sv(64): near "(": syntax error, unexpected '(', expecting function or task
In reply to alessio:
You only need +UVM_USE_OVM_RUN_SEMANTIC if you want global_stop_request to end your simulation instead of using the objection mechanism.
You should start with a clean work directory and do not compile the uvm_pkg.sv file yourself. That way Questa will use the pre-compiled uvm_pkg, add +incdir, and add the DPI libraries automatically. Once you start compiling your own UVM source, even if using the source files released with Questa, then you need to provide the +incdir and DPI libraries manually.
If you need further Questa tool support, you should contact Mentor support directly.
Dave
Got it, thank you very much!
I followed your suggestion (cleaned up work directory, omitted compiling uvm_pkg.sv myself)
and restarted the simulation. Voila, and it all works perfectly now. Thank you Dave!