Not receiving read data in monitor from the DUT for I2C protocol

UVM
,
1

Getting DATA MISMATCHED in scoreboard :

UVM_INFO testbench.sv(209) @ 310: uvm_test_top.e.a.d [DRV] mode:readd:: addr:1, wdata:22, rdata:x
UVM_INFO testbench.sv(355) @ 330: uvm_test_top.e.a.m [MON] DATA READ:: addr:1, data:x
UVM_INFO testbench.sv(407) @ 330: uvm_test_top.e.s [SCO] DATA MISMATCHED

The data value in monitor is ‘x’, that means monitor is not able to receive data from the DUT to read.

The link for the code on the eda playground : my_i2C_debug - EDA Playground

here is my monitor code:

class monitor extends uvm_monitor;
`uvm_component_utils(monitor)
transaction tr;
uvm_analysis_port#(transaction) send;
virtual i2c_i vif;

function new(string path="monitor",uvm_component parent=null);
  super.new(path,parent);
endfunction

virtual function void build_phase(uvm_phase phase);
  super.build_phase(phase);
  tr=transaction::type_id::create("tr");
  send=new("send",this);
  
  if(!uvm_config_db#(virtual i2c_i)::get(this,"","vif",vif))
     `uvm_error("MON","NOT ABLE TO MONITOR");
endfunction



virtual task run_phase(uvm_phase phase);
  forever begin
 @(posedge vif.clk);
   if(vif.rst)
    begin
      
    tr.md = rstdata; 
    `uvm_info("MON", "SYSTEM RESET DETECTED", UVM_NONE);
    send.write(tr);
    end
    else begin
      if(   vif.wr)
       
    
        begin
      tr.md     = writed;
      tr.wr     = 1;
      tr.din    = vif.din;
      tr.addr   =  vif.addr;
        
         
         
         `uvm_info("MON", $sformatf("DATA WRITE:: addr:%0d w_data:%0d",tr.addr,tr.din), UVM_NONE); 
      send.write(tr);
        end
    
      else if (   !vif.wr )
    
     begin
     
      tr.md     = readd;
     
      
      tr.addr  =  vif.addr;
       tr.wr   = 0;
       vif.done=1;
       tr.din  = vif.din;
        
       tr.datard = vif.datard;
     
        
       `uvm_info("MON", $sformatf("DATA READ:: addr:%0d, data:%0d",tr.addr, tr.datard), UVM_NONE); 
      send.write(tr);
     
     end
    

end
  end

endtask

endclass

2

In reply to gliese_581e:

You have a lot of errors, but here are some hints to help you:

For outputs from your DUT, you want to use a wire in your interface, not logic.
On EDA Playground, run your test with the other simulators as sometimes a simulator will accept non-compliant code and mask logic errors.

3

In reply to cgales:

yeah it’s showing many syntax errors with aldec simuator but no syntax erros with synopsys vcs, is that what you are referring to ?