Necessity of writing 'include "uvm_macros.svh"

UVM
,
1

Hi, all

I have one question about 'include “uvm_macros.svh”. Is it necessary to write it every time when importing uvm package? I found it’s already included at the beginning of uvm_pkg.sv. if it’s necessary could you explain it with one example? or it’s only a preventive action?


import uvm_pkg::*;
`include "uvm_macros.svh"   // Is it necessary

Thanks a lot
Tao

2

In reply to EnRoute_zt:

Read this.

3

In reply to cgales:

thanks. In fact, I’ve already read this article, and benefit a lot from this excellent article. but the uvm_marcos.svh is a macros definition file, which is included out side the package declaration.

when first compile $<uvm_pkg_path>/uvm_pkg.sv, all the macros in uvm_macros.svh will be defined. So when we import uvm_pkg, the macros inside uvm_macros.svh have already been defined, so including uvm_macros.svh once more will have no effect? I’m not sure about this.

Tao

4

In reply to EnRoute_zt:

Macros cannot made available through a package. You have to read in the corresponding definitions when you need them.

5

In reply to EnRoute_zt:

Compiler directives like the `define macros to not exist in any scope like a package. There are processed before recognizing any SystemVerilog syntax. They only exist while the current unit of code is being compiled (the compilation unit).

So it the answer to your question depends on whether the uvm_pkg was compiled as part of a separate compilation unit from where the code the imports the uvm_pkg, or not. Usually people use pre-compiled libraries for the uvm_pkg, so you need to do both the import and `include.

For the other case when everything is compiled as a single compilation unit, it doesn’t matter if you repeat the `include because there are compile guards in the uvm_macros.svh file that prevent redefinition warnings.

So you might as well `include in both cases just to keep your code more adaptable.

6

In reply to dave_59:

thanks, Dave and Chr_sue, seems clearer to me.

In uvm_pkg.sv file, code is written as below:


`include "uvm_macros.svh"

(* mti_design_element_load_message = "uvm-1.2 Built-in" *)

package uvm_pkg;
...
endpackage

`include “uvm_macros.svh” is written outside the package … endpackage. so the scope is defined by file? like uvm_pkg.sv here

Tao

7

In reply to EnRoute_zt:
I’ll repeat; it does not matter if the
`include “uvm_macros.svh” appears inside the
uvm_pkg;, or outside. All that matters is a macro must be `defined within the compilation unit before it can be used in the same compilation unit. You can assume the compiler pre-processing the text macros and compiler directives knows nothing about SystemVerilog syntax.

SystemVerilog allows a number of different approaches to compilation units. Each file that appears on the compiler’s command line can be a separate compilation unit. Or you can have groups of files on the command line in multiple compilation units, or you can have all files in one compilation unit. And for tools that allow multiple compilation steps, each step can be a separate compilation unit.

In all these cases, any included file is part of the same compilation unit as the file with the `Include statement.

8

In reply to dave_59:

Hi, Dave, thank you for your detailed explanation. I know better about the macros and the compilation unit know.

Tao

9

In reply to cgales:

Seems the link is broken

10

In reply to haykp:

Fixed.

11

So If a compilation unit consists of two files all of which include "foo.svh" which has define FOO_SVH and some classes declarations, FOO_SVH will only be defined once in this compilation unit but not others? If I removed one of the include "foo.svh", FOO_SVH will still be defined in this compilation unit? The file which has removed include "foo.svh" will still have the class declarations and no compilation error will appear?

And if two files are separated to two compilation units, FOO_SVH will be defined twice? If I removed one of the include "foo.svh", The file which has removed include "foo.svh" will not have the class declarations and compilation error will appear?

12

Can I have one file which has different compilation units?

For example
pkgs.sv:

package a;
    `include "uvm_macros.svh"
    import uvm_pkg::*;
    `include "classes_a.svh"
endpackage

package b;
    `include "uvm_macros.svh"
    import uvm_pkg::*;
    `include "classes_b.svh"
endpackage

Will there be two different compilation unit?
If that is the case, it is required to add two uvm_macros.svh?
Else, there will be one compilation unit for both packages? Any change to one package will result in recompilation of both packages file?

13

A file can only belong to one compilation unit. Any other file `include’d in that file must be part of the same compilation unit. Since the “uvm_macros.svh” file contains only `define macros, it should only be included once. Please reread this entire topic along with the links mentioned.