I have integrated UVM_RAL for my dut in the testbench as per Mentor’s recommendation. The reset value for the register field is shown as 'h2 as written in the configure() method of register class.
I am facing issue in sequence when I am trying to use set() followed by update() to write the sequence. In my sequence, my first step is to check the mirrored value for the register. But, the mirrored value for the register is coming different from the reset value.The reset value for the register is 'h2 but the mirrored value is coming as 'h0.
Please help - why the mirrored value is different from the reset value.
Thanks,
Ashish