Meaning of wrapper

Hi,

Can someone tell me what’s the meaning of wrapper with context to SV/UVM.

For eg: Quoting the statement from verificationguide:

  1. The uvm_event_base class is a wrapper class around the SystemVerilog event construct.

Other than the above statement, I have also heard the words like Interface Wrapper, callback wrapper.

Please explain the meaning, also if you could provide template code for wrapper, it would be helpful.

In reply to mukul1996:

A wrapper is a way of providing extended functionally with the use of inheritance, or simply providing an alternate API. The uvm_event_base class is doing both.

The SystemVerilog event construct give you syntax to trigger an event ->e and wait for an event**@e**. The uvm_event_base class provides methods to the exact same thing with the trigger and await methods. By using those methods it is also able to provide extra functionality like counting the number of processes waiting for the event to trigger.