Looking for an exercise materials to challenge myself in SystemVerilog and UVM preferably with solution

SystemVerilog
, ,
2

In reply to vvv:

Start from development of basic testbench environment for protocols like APB, SPI, AHB etc. You can find specifications from ARM, ST, TI etc.

Go through Coverage Cookbook HERE and UVM Cookbook HERE to know about verification Plan and Testbench Architectures.

Also see reference implementations of protocols like APB and AHB HERE.