Large Repetition No. Causes Slow Compile Time

In reply to sonofthesand:


// Your solution is OK, but is harder to read. However, I still prefer smaller assertions instead of one large one. 
sequence seq1(wu_state, M);  // Your OK solution 
    int cnt;
    (state == 0,cnt=0) [*1:$] ##1
    (state == 1)       [*1:$] ##1
    (state == 2,cnt++) [*1:$]  ##0
	(M==cnt)       ##1
    (state == 3)       [*1:$] ##1
    (state == 4)       [*5]   ##1
    (state == 5)       ;
  endsequence 

My preferred solution,with smaller assertions, more easily identifies which transition failed. It is also easier to read. For example, I read this in English for my solution with smaller assertions:
@ check_on, I stay in state0 until state1.
If in state1, I stay on state1 until state2
If in state2, I stay on state2 for M cycles and then go to state3.

Your solution makes a very long sentence, and the use of the variable makes it even more difficult to explain in plain English. It is more subjected to errors because of the complexity. KISS ((acronym)


assert_seq0to1: assert property(check_on |-> (state==0)[*1:$] ##1 (state == 1));
assert_seq1to2: assert property($changed(state) && (state == 1) |-> (state == 1)[*1:$] ##1 (state == 2)); 
assert_seq2to3: assert property($changed(state) && (state == 2) |-> (state == 2)[*M] ##1 (state == 3));  
assert_seq3to4: assert property($changed(state) && (state == 3) |-> (state == 3)[*1:$] ##1 (state == 4));  
assert_seq4to5: assert property($changed(state) && (state == 4) |-> (state == 4)[*5] ##1 (state == 5)); 
 

Ben Cohen
http://www.systemverilog.us/ ben@systemverilog.us
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