Issue with clocking block

In reply to DurgaKundan:

A clocking block defines signals that you need to sample as inputs, or drive as outputs. It does not define the signals themselves. You need to add them the the interface. Also, the directions in your task are the opposite of what they need to be based on how you’ve defined your clocking block.

interface exec (input clk);
  logic	[`DATA_WIDTH-1:0] exec_rd_data;
  logic stall;
  clocking cb_exec @(posedge clk);
    input  exec_rd_data; 
    output stall;  
  endclocking 
 
  task automatic send_inp (output logic [`DATA_WIDTH-1:0] exec_rd_data_st,
                           input  logic stall_st);
    exec_rd_data_st = cb_exec.exec_rd_data; //needs to be blocking assignment
    cb_exec.stall  <= stall_st;		
  end task
 
endinterface

Note the assignment to exec_rd_data_st needs to be blocking, otherwise it will not have the updated value when the task returns and copies out the value.