Issue when UVM Reg Frontdoor write followed by Backdoor read

UVM
1

Hi,
The current issue is when I frontdoor write to a register with 0x0000_0001, and after that I backdoor read the same register, the value obtained back is the previous value, which is 0x0000_0000. If I put a #1 in between these 2 transactions, it works fine.
However, in sequence I would like to avoid using this #1 workaround. I googled and wait_for_change is mentioned. And since it is a virtual method, I can have my custom method to override that. The example provided is to use hierarchical path to wait for clock, etc. which I believe in UVM register, there might have a way (or event to trigger) when the value completely written to the DUT only finish the transaction.

Please advice, thanks so much!

value = 'h1;
rg.write(status, value, UVM_FRONTDOOR, map, this);
rg.read(status, value1, UVM_BACKDOOR, map, this);

Thank you.
Hoong Han.

2

Hi Hoong,

You can use is_busy method available in the uvm_reg base class. It will returns 1 if register is currently being read or written.

So in you code after doing rg.write(status, value, UVM_FRONTDOOR, map, this);
continuous poll for this register via is_busy method.

Once is_busy function return with value 0. You can do the next operation rg.read(status, value1, UVM_BACKDOOR, map, this);.

I hope this will help you out.

Best Regards,
Chetan Shah
Sr. ASIC Verification Engineer (Level-1) | ASIC

Product Engineering Services
Software | Embedded | Semiconductor
Frost & Sullivan Company of the Year 2013-14

3

In reply to cashah85:

Hi Chetan Shah,

Thanks for your reply, I quickly modified the code to add the wait(rg.is_busy == 0); before the backdoor read, the result is still the same.
When I looked at the waveform, actually at that tick of time, the data is being written to the DUT, and backdoor read at the same time… possibly the scheduler of event that put the backdoor read first then only DUT gets updated, which cause the backdoor read reads the previous value.

Thank you.
Hoong Han.

4

In reply to Hoong Han:

Hi Hoong Han,

when you are rg.write(status, value, UVM_FRONTDOOR, map, this); operation, it will consume time and you get the acknowledgement from the RTL, then your next operation will perform which is rg.read(status, value1, UVM_BACKDOOR, map, this);.

But from your quick try result, I have doubt on your write operation. May be RTL is not able to give the acknowledgment of your write operation or there is some issue with the TB. May be your TB is not waiting for an acknowledgement and that is why your rg.read(status, value1, UVM_BACKDOOR, map, this); is performed at the same time.

There are possible way to debug is :

  1. Check your TB, whether it is able get the proper acknowledgement from the RTL or not?
  2. Check the value of enum uvm_status_e passed as a status in the write operation argument. It should be UVM_IS_OK. If it is not then there is some issue with the write operation(TB Component).

Regards,
Chetan Shah
Sr. ASIC Verification Engineer (Level-1) | ASIC

Product Engineering Services
Software | Embedded | Semiconductor
www.einfochips.com/
Frost & Sullivan Company of the Year 2013-14