Is it possible to map 2 different sequencers to a reg_map one for read one for write?

In reply to chr_sue:

Only reason to separate out rd and wr sequencer is to maintain the independent nature of AXI Wr and Rd channels. I think this can be achieved through single sequencer by forking off(join_none) driver code for Wr and Rd tasks and using semaphores to block task reentry until previous Rd/Wr are done. In this case there wont be any issue with RAL.