Is it a good idea to verify USB 2.0 Core without PHY ? Recently I have been trying to make an USB2.0 VIP with UVM Framework and I don't have any Phy Model

UVM
1

without PHY there is no common interface . What is you suggestion regarding this?

2

What is your DUT interface. Does it have DP/DN or UTMI/ULPI link layer interface?

Kiran

3

In reply to kiru2006:

I do not have Phy so only UTMI signals are available. I’m feeling difficulties in designing architecture of test bench for UVM. I do not have problem with AHB side.