1 &7 .The `uvm_seuqence_utils(sequencer) was used to register seq to sequencer .This method is deprecated.Drawback is that it hinders re usability and never works for parametrized sequences.
2. phase.get_name()
3.+uvm_set_config* is used to set the configuration value from the command line processor.
Eg ;- +uvm_set_config_int=uvm_test_top.soc_env,mode,5
4.The gap between objections , time between a raise and drop ? it depends on the code following the raise_objection
5.Highest hierarchy wins , when used within build_phase.
6.No sequencer to driver is a one to one connection.
Hope this helps ,if you have more questions pl do post them.