In reply to dave_59:
Dave,
I tried as below…
interface mem_ctrl_if (input logic Reset,input logic Clock);
logic [9:0] Addr;
wire [7:0] Data;
//rw_t RWn;
logic RWn;
endinterface
mem_ctrl module
module mem_ctrl (mem_ctrl_if mcif);
logic [3:0] Enable;
//Enable Memory based on [9:8] bits at Addr
assign Enable[0] = (mcif.Addr[9:8] == 2'b00) ? 1'b1 : 1'b0;
assign Enable[1] = (mcif.Addr[9:8] == 2'b01) ? 1'b1 : 1'b0;
assign Enable[2] = (mcif.Addr[9:8] == 2'b10) ? 1'b1 : 1'b0;
assign Enable[3] = (mcif.Addr[9:8] == 2'b11) ? 1'b1 : 1'b0;
genvar i;
generate
for (i=0; i<4; i++) begin : ram
RAM ram_i (.reset (mcif.Reset),.clock (mcif.Clock),.enable (Enable[i]),.rwn (mcif.RWn),.addr (mcif.Addr),.data (mcif.Data));
end
endgenerate
RAM module…
module RAM (input logic reset,clock,enable,rwn,[7:0] addr,inout wire [7:0] data);
logic [7:0] mem[0:255];
always @ (posedge clock or enable)
begin
if (enable)
begin
if (~rwn)
mem[addr] = data;
end
end
assign data = (~reset) ? 8'b0 : ((rwn && enable) ? mem[addr] : 8'bz);
endmodule
at mem_top…
module mem_top;
...
// Clock and reset signals
reg clock;
reg reset;
// The Memory interface
mem_ctrl_if mcif(.Reset (reset),.Clock (clock));
// DUT instantiation
mem_ctrl dut(mcif);
initial begin
#1000 $finish;
end
// Generate clock
always
#5 clock=~clock;
// Generate reset
initial begin
reset <= 1;
clock <=1;
#10 reset <= 0;
#100 reset <= 1;
#10000 reset <= 0;
end
//Initialize Memory
initial
fill_mem ();
task fill_mem ();
for(int k=0; k<4; k++)begin
for (int i=0;i<256;i++)begin
dut.ram[k].ram_i.mem[i] = 255-i;
end
end
endtask : fill_mem
...
endmodule
I’m getting error as below…
dut.ram[k].ram_i.mem[i] = 255-i;
|
ncelab: *E,NOTPAR (./mem_top.sv,62|11): Illegal operand for constant expression [4(IEEE)].
irun: *E,ELBERR: Error during elaboration (status 1), exiting.
Correct me if any issue in my code.
John