Instantiate a VHDL block to SV

SystemVerilog
2

You cannot use a defparam across the language boundary. Please use in-line parameter overrides instead of defparam.

SMCS332_top 
     #(
       .DEVICEID("name"), 
       .SMCSID(0)
      )
      SW_A (
     //Port declaration
     );

You should remove the use of defparam regardless.