Initializing a Register File

SystemVerilog
, ,
1

How do you initialize a register file? If I have the following register array:

logic [7:0] regs [7:0];

I can initialize one register in the array:

always_ff @(posedge clk) begin
    if (!resetn) begin
        regs[0] <= 8'b0;
    end
end

But how do I do that for the whole array? Also, does it matter if I swap the indices after the variable name when declaring the array?

logic [7:0] regs [0:7];
2

You can make assignments to one element, a slice, or the whole unpacked array. You can use an assignment pattern default to initialize a whole array.

regs = '{default:'0};

For unpacked arrays, the index order matters when copying the whole array to another array with a different ordering, or using a C interface. Copying is always from left index to right index. Bit-stream casting also uses left-to-right indexing.