Inheritance and abstract class

SystemVerilog
1

Abstract class is empty class, only definition is written, we can only extend it and implement.
where as in inheritance we extends from base class to extended class and we can override the base class methods.

so, why we need abstract class when we have inheritance ???

2

In reply to hamza_9515:

Abstract does not necessarily mean empty class, or unimplemented class; that is an interface class. See this link.

Abstract classes works with inheritance. You can use it whe a base class has no value by itself unless it is extended.