Index Ordering of queue passed to get_registers method

UVM
,
1

Hi all ,

I see an interesting ordering of indexes in the queue ( of type uvm_reg ) passed as argument ( ref direction ) in get_registers() method of uvm_reg_block .


// I have main reg_block containing 2 sub-blocks
class Main extends uvm_reg_block ;
 rand sub_reg_block1 reg_block_h1; // extends uvm_reg_block . Starts from address 0  via add_submap method
 rand sub_reg_block2 reg_block_h2; // extends uvm_reg_block   Started from address 40 via add_submap mnethod
endclass

uvm_reg q[$] ;

// Assume Main handle is Main_h which is instantiated inside rm_h ( register Model Handle ) 
rm_h.Main_h.get_registers( q ) ;
...
endclass

( Assume reg_block1 has 5 registers , reg_block2 has 2 registers )
So I expect that index 0 ( MSB ) should contain 1st register of sub_reg_block1 since it has its address before sub_reg_block2 .
index 4 of q will contain last register of reg_block1 and index 5 contains 1st register of reg_block2 and so on .

But I see different output : Index 0 to 1 points to the 2 registers of reg_block2 while index 2 onwards stores registers in reg_block1 .

Any thoughts on this ?

2

In reply to MICRO_91:

I asked this question a while back in a online training and the instructor said the order will be according to how the reg models and the registers inside each of them are built, you can double check that ordering to verify his claim as I didn’t.

HTH,

-R

3

In reply to MICRO_91:

This is an open request in the UVM to have the registers returned by get_registers returned in a predicable ordering.

For now you have to sort manually

q.sort with (item.get_address());