I want to set a DUT's signal with a default value without agent instantiation. Which is the best way to do that?

UVM
2

In reply to kevinvig7:

Will you still instantiate the agent’s interface in your testbench? If so, you can use a ‘mode’ variable in the interface which you can use to determine whether to drive the interface outputs from internal variables or idle states.


interface my_if;
  // Wires to connect to design
  wire my_if_a_wire;

  // Internal variables to be driven by agent
  reg my_if_a_reg;

  bit mode = 0; // 0 if idle, 1 if active

  assign my_if_a_wire = (mode == 0) ? 1'b0 : my_if_a_reg;
endinterface

If you don’t instantiate the interface, you will need to assign the signals directly in your testbench.