In reply to ajeetha:
Hi Ajeetha,
We use Questasim 10.1 for design verification. If we manually write the register classes, we can compile and run the tests using Questa. But for bigger dsigns, I require to generate the reg classes automatically.
Can you please tell me the Mentor’ tool that can generate the UVM RAL model (register classes and package) automatically by taking the xml file of registers?
As you mentioned, Certe from Mentor doesn’t look like a dedicated tool for RAL generation, but Agnisys is an interesting tool and I can also see and understand the way of automated generation of RAL
Thanks,
Rajeshwar