Hi all,
I have 3 sequences listed as below…
virtual class mem_base_sequence extends uvm_sequence #(mem_pkt);
...
virtual task pre_body();
if (starting_phase!=null) begin
`uvm_info(get_type_name(),
$sformatf("%s pre_body() raising %s objection", get_sequence_path(),
starting_phase.get_name()),UVM_MEDIUM );
starting_phase.raise_objection(this);
end
endtask
virtual task post_body();
if (starting_phase!=null) begin
`uvm_info(get_type_name(),
$sformatf("%s post_body() dropping %s objection",
get_sequence_path(),
starting_phase.get_name()), UVM_MEDIUM);
starting_phase.drop_objection(this);
end
endtask
endclass : mem_base_sequence
// SEQUENCE: mem_abv_seq
class mem_abv_seq extends mem_base_sequence;
// ...
virtual task body();
`uvm_info(get_type_name(),"Calling mem_abv_seq sequence",UVM_LOW)
repeat (100) begin
#10;
`uvm_do_with(req,
{ req.addr >= 150; req.data < 150; } )
end
//get_response(rsp);
endtask
endclass : mem_abv_seq
// SEQUENCE2: mem_blw_seq
class mem_blw_seq extends mem_base_sequence;
...
virtual task body();
`uvm_info(get_type_name(),"Calling mem_blw_seq sequence",UVM_LOW)
repeat (100) begin
#10;
`uvm_do_with(req,
{ req.addr < 150; req.data >= 150; } )
end
//get_response(rsp);
endtask
endclass : mem_blw_seq
// SEQUENCE3: mem_zero_seq
class mem_zero_seq extends mem_base_sequence;
...
virtual task body();
`uvm_info(get_type_name(),"Calling mem_zero_seq sequence",UVM_LOW)
repeat (10) begin
#100;
`uvm_do_with(req,
{req.addr inside {0,255}; req.data inside {0,255}; } )
end
`uvm_info(get_type_name()," mem_zero_seq Done!!",UVM_LOW)
//get_response(rsp);
endtask
endclass : mem_zero_seq
Here is my seq_lib
// SEQUENCE LIB: mem_seq_lib
class mem_seq_lib extends uvm_sequence_library #(mem_pkt);
function new(string name="mem_seq_lib");
super.new(name);
add_sequence (mem_abv_seq::get_type());
add_sequence (mem_blw_seq::get_type());
add_sequence (mem_zero_seq::get_type());
init_sequence_library();
endfunction
`uvm_object_utils(mem_seq_lib)
endclass : mem_seq_lib
Here is my test class
// Test class
class mem_test extends uvm_test;
`uvm_component_utils(mem_test)
// TB handle
mem_tb memtb;
mem_seq_lib seq_lib;
// Constructor
function new(string name = "mem_test", uvm_component parent);
super.new(name, parent);
endfunction: new
// Build phase
virtual function void build_phase(uvm_phase phase);
//Create memtb
memtb = mem_tb::type_id::create ("memtb",this);
//Setting default Seq for the Seqr
uvm_config_wrapper::set(this,"memtb.memenv.agents[0].seqr.run_phase","default_sequence",mem_zero_seq::type_id::get());
super.build();
endfunction :build_phase
//End of elaboration phase
function void end_of_elaboration_phase(uvm_phase phase);
uvm_report_info(get_full_name(),"End of Elaboration",UVM_LOG);
print();
endfunction : end_of_elaboration_phase
//Run Task
task run_phase (uvm_phase phase);
`uvm_info(get_type_name(),
$sformatf("Test Raising Objection"),UVM_MEDIUM);
uvm_test_done.raise_objection (this);
//seq_lib.mem_blw_seq.starting_phase = phase;
//seq_lib.mem_blw_seq.start(memtb.memenv.agents[0].seqr);
#2000;
global_stop_request();
//To stop the run_phase
`uvm_info(get_type_name(),
$sformatf("Test Dropping Objection"), UVM_MEDIUM);
uvm_test_done.drop_objection (this);
endtask : run_phase
endclass
When I tried to start a sequence (other than default_sequence) from the test run_phase, I’m getting compliant…
Let say I have only one sequencer which is “seqr”
Can you anyone explain me, how to start the sequence?
Appropriate place to start.
John